.fill 2*NR_CPUS,8,0 /* space for TSS and LDT per CPU */
.org 0x2000
-ENTRY(idle_pg_table) # Initial page directory is 4kB
- .org 0x3000
+/* Maximum STACK_ORDER for x86/32 is 1. We must therefore ensure that the */
+/* CPU0 stack is aligned on an even page boundary! */
ENTRY(cpu0_stack)
- .org 0x3000 + STACK_SIZE
+
+ .org 0x2000 + STACK_SIZE
+ENTRY(idle_pg_table)
+
+ .org 0x2000 + STACK_SIZE + PAGE_SIZE
ENTRY(stext)
ENTRY(_stext)
ENTRY(idle_pg_table_l3)
.quad idle_pg_table_l2 - __PAGE_OFFSET + 7
-/* Initial PDE -- level-2 page table. Maps first 64MB physical memory. */
.org 0x4000
+/* Maximum STACK_ORDER for x86/64 is 2. We must therefore ensure that the */
+/* CPU0 stack is aligned on a 4-page boundary. */
+ENTRY(cpu0_stack)
+
+/* Initial PDE -- level-2 page table. Maps first 64MB physical memory. */
+ .org 0x4000 + STACK_SIZE
ENTRY(idle_pg_table_l2)
.macro identmap from=0, count=32
.if \count-1
.endm
identmap /* Too orangey for crows :-) */
- .org 0x5000
-ENTRY(cpu0_stack)
-
- .org 0x5000 + STACK_SIZE
+ .org 0x4000 + STACK_SIZE + PAGE_SIZE
.code64
ENTRY(stext)
ENTRY(_stext)
extern void initialize_keytable();
extern int do_timer_lists_from_pit;
+extern unsigned long cpu0_stack[];
+
struct cpuinfo_x86 boot_cpu_data = { 0, 0, 0, 0, -1 };
#if defined(CONFIG_X86_64)
static void __init start_of_day(void)
{
-#ifdef MEMORY_GUARD
/* Unmap the first page of CPU0's stack. */
- extern unsigned long cpu0_stack[];
memguard_guard_stack(cpu0_stack);
-#endif
open_softirq(NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ, new_tlbflush_clock_period);
#endif
}
+#define EARLY_FAIL() for ( ; ; ) __asm__ __volatile__ ( "hlt" )
+
void __init __start_xen(multiboot_info_t *mbi)
{
char *cmdline;
if ( !(mbi->flags & MBI_MODULES) || (mbi->mods_count == 0) )
{
printk("FATAL ERROR: Require at least one Multiboot module.\n");
- for ( ; ; ) ;
+ EARLY_FAIL();
+ }
+
+ if ( ((unsigned long)cpu0_stack & (STACK_SIZE-1)) != 0 )
+ {
+ printk("FATAL ERROR: Misaligned CPU0 stack.\n");
+ EARLY_FAIL();
}
xenheap_phys_end = opt_xenheap_megabytes << 20;